Method of fabricating MOSFET transistors with multiple...

Details Method of fabricating MOSFET transistors with multiple... Method of fabricating MOSFET transistors with multiple...

2005-12-27

2005-12-27

Lebentritt, Michael (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S237000, C438S276000, C438S289000

Reexamination Certificate

active

06979609

ABSTRACT:
A method for processing dual threshold nMOSFETs and pMOSFETs requiring only one additional masking and implantation operation over single threshold MOSFETs is disclosed. The additional mask and implant operation both enhances the threshold voltage doping of one type of FET and compensates the threshold voltage doping of another type of FET. Where a first threshold voltage implant sets the threshold voltage for an NMOS device to a low threshold voltage, and a second threshold voltage implant sets the threshold voltage for a PMOS device to a high threshold voltage, a third implant may both enhance a NMOS device threshold implant to set the threshold voltage high while compensating a PMOS device threshold implant to set the threshold voltage low.

REFERENCES:
patent: 5747855 (1998-05-01), Dennison et al.
patent: 5789788 (1998-08-01), Ema et al.
patent: 6096611 (2000-08-01), Wu
patent: 6258645 (2001-07-01), Kang
patent: 6426261 (2002-07-01), Fujii et al.

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