Method of fabricating MOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S583000, C257SE21444

Reexamination Certificate

active

07625800

ABSTRACT:
A method for fabricating a MOS transistor is suitable for modifying the configuration of a gate electrode. The method includes coating a first oxide layer on a semiconductor substrate and removing a predetermined width of the first oxide layer; forming an LDD region in the substrate; forming a gate spacer on the substrate; forming a channel in the LDD region, forming a gate oxide layer; forming a polysilicon gate electrode; and forming source/drain diffusion regions. Accordingly, a line width of the gate electrode can be reduced without employing lithography of high precision, and an area reserved for salicide can be maximally secured on the gate and source/drain regions.

REFERENCES:
patent: 4564583 (1986-01-01), Maeguchi
patent: 5428240 (1995-06-01), Lur
patent: 5434093 (1995-07-01), Chau et al.
patent: 5538913 (1996-07-01), Hong
patent: 6025232 (2000-02-01), Wu et al.
patent: 6214677 (2001-04-01), Lee
patent: 6225173 (2001-05-01), Yu
patent: 6770532 (2004-08-01), Chuang et al.

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