Method of fabricating MOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S305000, C438S307000

Reexamination Certificate

active

07084039

ABSTRACT:
A method of fabricating a CMOS (complementary metal oxide semiconductor) transistor includes manufacturing steps, by which adverse transistor characteristics can be prevented from being degraded by high-temperature annealing for hardening a screen oxide layer. The method includes steps of forming a gate on a semiconductor substrate with a gate oxide layer therebetween, forming a screen oxide layer on the substrate and the gate, forming a nitride layer on the screen oxide layer, forming LDD regions in the substrate substantially aligned with the gate, removing the nitride layer, forming a spacer on the screen oxide layer and on at least a portion of a sidewall of the gate, and forming in the substrate source/drain regions extending from the LDD regions respectively in the substrate substantially aligned with the spacer.

REFERENCES:
patent: 6144071 (2000-11-01), Gardner et al.
patent: 6258680 (2001-07-01), Fulford et al.
patent: 6534388 (2003-03-01), Lin et al.

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