Method of fabricating micro electro mechanical system...

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive

Reexamination Certificate

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C438S055000, C438S064000

Reexamination Certificate

active

06391673

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a micro electro mechanical system (MEMS) structure which can be vacuum-packaged at the wafer level.
2. Description of the Related Art
In the case of surface micromachining most widely used in fabricating MEMS structures, polysilicon is used as the material for the structure. Here, residual stress existing in the poly silicon has a negative influence on a completed MEMS structure. Moreover, it is difficult to fabricate a structure having a thickness greater than 10 &mgr;m with general polysilicon taking into consideration the fabrication processes that are available. To solve this problem, a process of using SOI or a result obtained by bonding single crystalline silicon to glass to a thickness of 40 &mgr;m as a structure layer has been used. Although this process can realize a structure which is thick and does not have residual stress, it is difficult to form more than one structure layer. Consequently, a complex structure cannot be formed through this process. In the case of bulk micromachining that forms a MEMS structure using single crystalline anisotropic etching, it is difficult to form a structure having a high aspect ratio due to the characteristic of anisotropic etching.
In resonance type gyroscopes among MEMS structures, the Q-factor is vulnerable to the surrounding vacuum level during resonance. For this reason, fabricated MEMS structures should be packaged in a vacuum state through complex processes. Additionally, it is difficult to apply a general IC/ASIC packaging process to chips having a MEMS structure. Therefore, it is difficult to realize automization of the fabrication process.
SUMMARY OF THE INVENTION
To solve the above problems, it is a first object of the present invention to provide a method of fabricating a micro electro mechanical system (MEMS) structure, which can easily form a vacuum structure.
It is a second object of the present invention to provide a method of fabricating a MEMS structure which can be vacuum-packaged at the wafer level.
It is a third object of the present invention to provide a method of fabricating a MEMS structure which has a pad in itself so that it can be installed in a circuit board.
Accordingly, to achieve the above objects of the invention, in one embodiment, there is provided a method of fabricating a MEMS structure which can be vacuum-packaged at the wafer level. The method includes a first step of forming a multilayered stack including a signal line on a first wafer; a second step of bonding a second wafer to the multilayered stack; a third step of polishing the first wafer to a predetermined thickness; a fourth step of forming a MEMS structure in a vacuum area of the first wafer and a pad outside the vacuum area, the MEMS structure and the pad being connected to the signal line; a fifth step of forming a structure in a third wafer to have space corresponding to the vacuum area of the MEMS structure; and a sixth step of bonding the third wafer to the polished surface of the first wafer in a vacuum state.
The fourth step preferably includes a sub-step of forming a signal line layer for connecting the inner area to the pad while the MEMS structure is being stacked.
In the sixth step, the third wafer is bonded to the first wafer using an adhesive, or the third wafer is directly bonded to the first wafer by silicon direct bonding (SDB), anodic bonding or eutectic bonding.
The third wafer is preferably formed of single crystalline silicon. In the fifth step, the third wafer is preferably processed by an anisotropic etching method.
In another embodiment, there is provided a method of fabricating a MEMS structure which can be vacuum-packaged at the wafer level. The method includes a first step of forming a sacrificial layer having a predetermined pattern on a first wafer; a second step of forming a poly silicon layer having a predetermined pattern for a signal line on the sacrificial layer; a third step of forming an insulation layer on the poly silicon layer; a fourth step of bonding a second wafer to the insulation layer; a fifth step of polishing the first wafer to a predetermined thickness; a sixth step of forming a MEMS structure comprising a resonant plate and a frame supporting the resonant plate in a vacuum area of the first wafer and a pad outside the vacuum area, the MEMS structure and the pad being connected to the signal line; a seventh step of forming a structure in a third wafer to have space corresponding to the vacuum area of the MEMS structure; and an eighth step of bonding the third wafer to the polished surface of the first wafer in a vacuum state.
In the eighth step, the third wafer is bonded to the first wafer using an adhesive, or the third wafer is directly bonded to the first wafer by silicon direct bonding or anodic bonding.
The first wafer is preferably formed of single crystalline silicon. In the seventh step, the third wafer is preferably processed by an anisotropic etching method.


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