Method of fabricating lightly-doped drain transistor having inve

Details Method of fabricating lightly-doped drain transistor having inve Method of fabricating lightly-doped drain transistor having inve

1998-05-18

2000-10-10

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438592, H01L 21336

Patent

active

061301353

ABSTRACT:
A method of fabricating a lightly doped drain transistor having an inverse-T gate structure. A semiconductor substrate is provided to implement said method. After a gate dielectric layer is formed on the substrate, the step of sequentially forming a first amorphous silicon layer and a second amorphous silicon layer follows. Then, the second amorphous silicon layer is patterned to form a first electrode, and first spacers are formed on sidewalls of the first electrode. Lightly-doped layers are thereafter formed in the substrate, and thus the first amorphous silicon layer is patterned to form a second electrode. Both steps make use of the first electrode and the first spacers as masking. Subsequently, second spacers are formed to overlie the first spacers and sidewalls of the second electrode. After heavily-doped layers are formed in the substrate by using the first electrode and the second spacers as masking, the lightly-doped layers are driven in so as to be fully covered by the second electrode.

REFERENCES:
patent: 4968639 (1990-11-01), Bergonzoni
patent: 5219777 (1993-06-01), Kang
patent: 5585295 (1996-12-01), Wu

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