Method of fabricating LDMOS semiconductor devices

Details Method of fabricating LDMOS semiconductor devices Method of fabricating LDMOS semiconductor devices

2003-02-20

2004-10-05

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S306000, C438S529000

Reexamination Certificate

active

06800528

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a method of fabricating semiconductor devices, particularly to a method of fabricating LDMOS (Lateral Double-Diffused MOS) semiconductor devices.
A LDMOS semiconductor device is generally used by an IC that requires high reliability and has a relatively high voltage when used. An example of the configuration of a conventional LDMOS semiconductor device is disclosed in a literature, i.e., JP A8-97410. The LDMOS semiconductor device disclosed in this reference has an LDMOS configuration wherein a self-aligned channel length is not determined by only heat treatment for forming a deep well (DWELL) region and a source region.
In the conventional techniques set forth above, the gate oxide film is formed after the source region and the DWELL region were formed. Since the concentration of impurities is made high in the order of the substrate, the DWELL region, the source region, there occurs a difference in oxidation speed because of the difference in concentration of impurities. Accordingly, if the oxide film is formed after the DWELL region and the source region were formed on the substrate, there are inevitably formed level differences (Tox1>Tox2>Tox3) between respective gate oxide films of the source region (Tox1), the DWELL region (Tox2) and the NWELL (Tox3). The portion of the oxide film on which these level differences are formed is a gate oxide film region.
If there are portions having different thickness on the gate oxide film region, an electric field distribution is not uniform in the gate oxide film, causing a problem of a reliability in a voltage resistance of the gate oxide film. Particularly, a level difference of the gate oxide film formed over a boundary region between the DWELL and the NWELL has a significant impact on a voltage resistance characteristic of the gate oxide film.
The inventors of this application devoted themselves to study and came to a conclusion that an LDMOS semiconductor device having a gate oxide film which is excellent in voltage resistance characteristics is obtained by forming a DWELL region, a source region and a drain region each having a different concentration of impurities in a substrate using an impurity implantation process, and a heat diffusion process after an oxide film serving as a gate oxide film was previously formed flat and uniform in thickness.
SUMMARY OF THE INVENTION
The invention provides a method of fabricating a semiconductor device capable of uniforming a film thickness of a gate oxide film conventionally formed over a portion in the vicinity of a boundary region between a DWELL and an NWELL but also a film thickness of the gate oxide film, and hence capable of flattening the front surface of the gate oxide film.
According to the method of fabricating an LDMOS semiconductor device of the invention, a combined layer including a gate oxide film and a first nitride film is formed on a substrate within a first region. A mask body is formed on the combined layer within a second region that is inside of the first region. Then, first impurities are introduced into the substrate outside of the second region using the mask body as a mask. Next, second impurities are introduced into the substrate outside of the first region using the mask body and the combined layer as a mask. Finally, the introduced first and second impurities are diffused by a heat treatment so as to form a source/drain region and a well region.


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