Method of fabricating interconnections of microelectronic...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S638000, C438S924000, C257SE21579, C257SE21497

Reexamination Certificate

active

07553758

ABSTRACT:
Method of Fabricating Interconnections of a Microelectronic Device Using a Dual Damascene Process. A method of fabricating interconnections of a microelectronic device includes preparing a semiconductor substrate comprising a lower dielectric layer and a lower interconnection, forming an etch stopper layer and an interlayer dielectric layer on the semiconductor substrate, forming a via hole in the interlayer dielectric layer so that the etch stopper layer is exposed through the via hole, performing carbon doping on the etch stopper layer, performing trench etching to form a trench in the interlayer dielectric layer so that the trench overlaps part of the via hole, removing the carbon-doped etch stopper layer, and filling the via hole and the trench with a conductive material to form an upper interconnection.

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patent: 6518166 (2003-02-01), Chen et al.
patent: 6649515 (2003-11-01), Moon et al.
patent: 7172959 (2007-02-01), Lee
patent: 2003/0224595 (2003-12-01), Smith et al.
patent: 2004/0140289 (2004-07-01), Su et al.
patent: 2004/0185655 (2004-09-01), Jiang et al.
patent: 2004-221104 (2004-08-01), None
patent: 10-0430472 (2004-04-01), None

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