Method of fabricating high voltage semiconductor devices...

Details Method of fabricating high voltage semiconductor devices... Method of fabricating high voltage semiconductor devices...

2011-01-11

2011-01-11

Wojciechowicz, Edward (Department: 2895)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S138000, C438S259000

Reexamination Certificate

active

07867855

ABSTRACT:
A high-voltage field-effect device contains an extended drain or “drift” region having a plurality of JFET regions separated by portions of the drift region. Each of the JFET regions is filled with material of an opposite conductivity type to that of the drift region, and at least two sides of each JFET region is lined with an oxide layer. In one group of embodiments the JFET regions extend from the surface of an epitaxial layer to an interface between the epitaxial layer and an underlying substrate, and the walls of each JFET region are lined with an oxide layer. When the device is blocking a voltage in the off condition, the semiconductor material inside the JFET regions and in the drift region that separates the JFET regions is depleted. This improves the voltage-blocking ability of the device while conserving chip area. The oxide layer prevents dopant from the JFET regions from diffusing into the drift region and allowing the JFET regions to be accurately located in the drift region.

REFERENCES:
patent: 5488236 (1996-01-01), Baliga et al.
patent: 6534367 (2003-03-01), Peake et al.
patent: 6800903 (2004-10-01), Rumenik et al.

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