Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-06-07
1997-05-20
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, H01L 218246
Patent
active
056311800
ABSTRACT:
A method of forming ROM transistor memory cell including not forming lightly doped regions in the semiconductor substrate for some of the memory cells so as to form one type of memory cell and forming the lightly doped regions in another type of memory cell.
REFERENCES:
patent: 4406049 (1983-09-01), Tam et al.
patent: 4536944 (1985-08-01), Bracco et al.
patent: 4599118 (1986-07-01), Han et al.
patent: 4649629 (1987-03-01), Miller et al.
patent: 5073514 (1991-12-01), Ito et al.
patent: 5081052 (1992-01-01), Kobayashi et al.
patent: 5200802 (1993-04-01), Miller
Berg John
Carver Damian
Gyure Alex
Manos Pete
Chaudhari Chandra
Zilog Inc.
LandOfFree
Method of fabricating high threshold metal oxide silicon read-on does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating high threshold metal oxide silicon read-on, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating high threshold metal oxide silicon read-on will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1723490