Method of fabricating heterojunction devices integrated with...

Details Method of fabricating heterojunction devices integrated with... Method of fabricating heterojunction devices integrated with...

2007-09-04

2007-09-04

Weiss, Howard (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having junction gate

C438S194000, C438S199000

Reexamination Certificate

active

11176538

ABSTRACT:
A method of fabricating heterojunction devices, in which heterojunction devices are epitaxially formed on active area regions surrounded by field oxide regions and containing embedded semiconductor wells. The epitaxial growth of the heterojunction device layers may be selective or not and the epitaxial layer may be formed so as to contact individually each one of a plurality of heterojunction devices or contact a plurality of heterojunction devices in parallel. This method can be used to fabricate three-terminal devices and vertically stacked devices.

REFERENCES:
patent: 5557121 (1996-09-01), Kozuka
patent: 5686734 (1997-11-01), Hamakawa
patent: 5985689 (1999-11-01), Gofuku
patent: 6058229 (2000-05-01), Burrows
patent: 6091127 (2000-07-01), Chandra
patent: 6580104 (2003-06-01), U'Ren
Vonsovici et al. “Room Temperature Photocurrent Spectroscopy of SiGe/Si p-i-n Photodiodes Grown by Selective Epitaxy”, IEEE Transactions on Electron Devices, vol. 45, No. 2, 2002.

Affiliated with

Also associated with

Rating

Method of fabricating heterojunction devices integrated with... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating heterojunction devices integrated with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating heterojunction devices integrated with... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3721399