Method of fabricating gate structures

Details Method of fabricating gate structures Method of fabricating gate structures

2010-02-19

2011-10-04

Garber, Charles (Department: 2812)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

Reexamination Certificate

active

08030214

ABSTRACT:
An embodiment of the disclosure includes a method of forming metal gate structures. A substrate is provided. A first dummy gate electrode and a second dummy gate electrode are formed on the substrate. The first dummy gate electrode comprises first spacers on its sidewalls and the second dummy gate electrode comprises second spacers on its sidewalls. A hardmask layer is formed to covers both the first dummy gate electrode and the second dummy gate electrode. A patterned photoresist layer on the hardmask layer that covers a portion of the hardmask layer over the second dummy gate electrode and that leaves a portion of the hardmask layer over the first dummy gate electrode exposed. The portion of the exposed hardmask layer over the first dummy gate electrode is removed. The first spacers and the first dummy gate electrode is exposed to a first plasma environment comprising O2, HBr, and Cl2. The first dummy gate electrode is removed in a second plasma environment comprising NF3, HBr, and Cl2thereby leaving a hole surrounded by the first spacers. The hole is filled with a metal gate layer.

REFERENCES:
patent: 2008/0045022 (2008-02-01), Kurihara et al.
patent: 2009/0014812 (2009-01-01), Wang et al.
patent: 2009/0101956 (2009-04-01), Booth et al.
patent: 2010/0270627 (2010-10-01), Chang et al.

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