Method of fabricating gate structure of semiconductor device...

Details Method of fabricating gate structure of semiconductor device... Method of fabricating gate structure of semiconductor device...

2000-08-16

2001-12-25

Booth, Richard (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S596000

Reexamination Certificate

active

06333251

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating semiconductor devices, and more particularly, to a method of fabricating a gate for repairing damage to a gate oxide layer.
2. Description of the Related Art
With a demand for high-speed operation of semiconductor devices, a material having a higher conductance is used as an electrode which contacts a gate, a drain or a source. For example, a material such as silicide or metal is used as a gate or electrode as shown in U.S. Pat. No. 5,814,537 to Maa, et. al., entitled “Method of Forming Transistor Electrodes from Directionally Deposited Silicide”, filed on Sep. 29, 1998, or U.S. Pat. No. 5,194,403 to Delage, et. al., entitled “Method for the Making of the Electrode Metalizations of a Transistor”, filed on Apr. 16, 1993. Also, tungsten silicide WSi
x
can be used as a gate as in U.S. Pat. No. 5,804,499 to Dehm, et. al., entitled “Prevention of Abnormal Wsi.sub.x Oxidation by in-situ Amorphous Silicon Deposition”, filed on Sep. 8, 1998. Also, this patent discloses protection of a tungsten silicide layer using an amorphous silicon layer to prevent oxidation of tungsten silicide.
Meanwhile, in order to form a gate, a process for patterning a conductive layer at a required scale is performed after a gate oxide layer and the conductive layer are deposited on a semiconductor substrate. In this patterning process, the gate oxide layer below the conductive layer can be damaged. Particularly, the edge of the gate oxide layer, that is, a portion adjacent to the sidewall of the patterned conductive layer, is damaged more than other portions. This damage can cause a degradation in the characteristics of a transistor, so that a thermal treatment process for repairing the damaged gate oxide layer is required.
However, the thermal treatment may cause a defect within a gate. For example, as shown in
FIG. 1
, a defect such as a cavity or void
37
may be formed within a gate which comprises polycrystalline silicon layer
31
/tungsten silicide layer
35
.
To be more specific, a gate oxide layer
20
is deposited on a semiconductor substrate
10
, and the polycrystalline silicon layer
31
and the tungsten silicide layer
35
are sequentially formed and patterned by dry etching. At this time, the gate oxide layer
20
under the polycrystalline silicon layer
31
is eroded and damaged by the dry etching. In order to repair this damage to the gate oxide layer
20
, a thermal treatment with an oxidation atmosphere is performed. During the thermal treatment, the sidewall surfaces of the patterned polycrystalline silicon layer
31
and tungsten silicide layer
35
can be oxidized, resulting in a silicon oxide layer
20
′. Accordingly, the damage to the gate oxide layer
20
is repaired, particularly damage to the edge thereof adjacent to the sidewall of the patterned polycrystalline silicon layer
31
.
In the tungsten silicide layer
35
, a supply of silicon in this thermal treatment is accomplished by consumption of excessive silicon contained in the tungsten silicide layer
35
itself. However, the amount of the excessive silicon is limited, so that the tungsten silicide layer
35
acts as a silicon supply source only in the early stage of thermal treatment. As thermal treatment progresses, silicon required by oxidation is provided from the polycrystalline silicon layer
31
below the tungsten silicide layer
35
.
That is, silicon contained in the polycrystalline silicon layer
31
moves into the tungsten silicide layer
35
or to the surface thereof due to diffusion or the like, and is consumed for oxidation. This movement of silicon may generate cavity
37
within the polycrystalline silicon layer
31
. Consequently, the generation of the cavity
37
deteriorates the operational characteristics of a transistor.
In particular, when dichlorosilane SiH
2
Cl
2
(hereinafter referred to as “DCS”) is used as a source gas used for depositing the tungsten silicide layer
35
in order to reduce the content of fluorine (F) in the tungsten silicide layer
35
, the generation of the cavity
37
becomes serious. When the tungsten silicide layer is formed of DCS or the like, a very small amount of chlorine (Cl) remains within the tungsten silicide layer
35
. Chlorine (Cl) helps diffuse silicon, thus increasing the mobility of silicon from the polycrystalline silicon layer
31
.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of fabricating a gate of a semiconductor device, by which a defect such as cavities is prevented from being generated in the gate, and damage to a gate oxide layer can be repaired.
To achieve the above object of the invention, in an aspect of a method for fabricating a gate of a semiconductor device, a gate oxide layer is formed on a semiconductor substrate. A conductive layer containing silicon is formed on the gate oxide layer. A stacked structure with a polycrystalline silicon layer and a tungsten silicide layer can be used as the conductive layer. Here, the tungsten silicide layer is deposited on the polycrystalline silicon layer using a reaction gas containing dichlorosilane and tungsten fluoride.
Next, an etch mask for selectively exposing a portion of the conductive layer is formed on the conductive layer, and a gate is formed by etching the exposed portion of the conductive layer. A silicon source layer which covers the sidewall of the gate is formed by selective epitaxial growth of silicon. The silicon source layer is grown to a thickness of about 200 Å or less. The silicon source layer is thermally treated in an oxidation atmosphere, thus repairing damage to the gate oxide layer.
According to the present invention, thermal treatment having an oxidation atmosphere for recovering a gate oxide layer prevents a defect such as cavities from being generated within a polycrystalline silicon layer below a tungsten silicide layer.


REFERENCES:
patent: 4716131 (1987-12-01), Okazawa et al.
patent: 5238859 (1993-08-01), Kamijo et al.
patent: 5599725 (1997-02-01), Dorleans et al.
patent: 5710054 (1998-01-01), Gardner et al.
patent: 5736455 (1998-04-01), Iyer et al.
patent: 5756365 (1998-05-01), Kakumu
patent: 5804499 (1998-09-01), Dehm et al.
patent: 5877058 (1999-03-01), Gardner et al.
patent: 6124170 (2000-09-01), Lim et al.
patent: 6124190 (2000-09-01), Yamamoto et al.

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