Method of fabricating flat-cell mask read-only memory (ROM) devi

Details Method of fabricating flat-cell mask read-only memory (ROM) devi Method of fabricating flat-cell mask read-only memory (ROM) devi

1996-11-12

1998-12-08

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438587, 438592, 148DIG20, H01L 218236

Patent

active

058468650

ABSTRACT:
A method of fabricating flat-cell mask ROM devices having buried bit-lines that will not be subject to punch-through between neighboring bit lines as a result of heating in subsequent steps after the buried bit-lines are formed. In the method, the first step is to prepare a semiconductor substrate with a gate oxide layer formed thereon. Thereafter, a first polysilicon layer is formed over the gate oxide layer, and a plurality of trenches at predetermined positions, with these trenches extending through the gate oxide and first polysilicon layer and into the substrate to a predetermined depth. Then, trenches are filled with tungsten to form a plurality of source/drain regions. A second polysilicon layer is then formed over the first polysilicon layer, and an insulating layers is formed over each of the source/drain regions. Thereafter, a third polysilicon layer is formed over the second polysilicon layer and the insulating layers, and finally the third polysilicon layer is defined to form a gate for the integrated circuit device. Since the source/drain regions are made of tungsten metal, the spacing distance therebetween will not be changed when subjected to high-temperature conditions during subsequent process steps. The punch-through effect can thus be avoided.

REFERENCES:
patent: 4520552 (1985-06-01), Arnould et al.
patent: 4587712 (1986-05-01), Baliga
patent: 4803173 (1989-02-01), Sill et al.
patent: 5712203 (1998-01-01), Hsu
patent: 5753551 (1998-05-01), Sung

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