Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-05-17
2000-11-28
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438564, H01L 218247
Patent
active
061534714
ABSTRACT:
A method of fabricating a flash memory. After the formation of a trench isolation structure, openings are formed, in a direction perpendicular to the orientation of the trench isolation structure, in order to form a buried bit line. A spacer is formed on the opening sidewall of the bit line in which the distance between a top of the spacer and the interface of a substrate and a pad oxide layer is the depth of the source/drain region. The opening is then filled with a doped polysilicon conducting layer used as the buried bit line. The dopant from the polysilicon conducting layer is driven into the substrate to form the source/drain region.
REFERENCES:
patent: 6057195 (2000-05-01), Wu
patent: 6063668 (2000-05-01), He et al.
Hong Gary
Lee Claymens
Booth Richard
Huang Jiawei
United Semiconductor Corp.
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