Method of fabricating flash memory

Details Method of fabricating flash memory Method of fabricating flash memory

1998-12-09

2000-12-19

Nelms, David

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438266, 438305, H01L 21336

Patent

active

061626856

ABSTRACT:
A flash memory. An oxide layer is on a substrate. A stacked gate is formed on the substrate. A tunnel diffusion region is formed in the substrate next to a first side of the stacked gate. The tunnel diffusion region extends to a portion of the substrate under the stacked gate. A doped region is formed in the substrate next to a second side of the stacked gate. The doped region is distant away from the stacked gate by a lateral distance. An inter-poly dielectric layer covers the tunnel diffusion region, the doped region, and the stacked gate. A polysilicon layer is on the inter-poly dielectric layer and extends perpendicular to the stacked gate.

REFERENCES:
patent: 5587332 (1996-12-01), Chang et al.
patent: 5960284 (1999-09-01), Lin et al.
patent: 6008089 (1999-12-01), Hong

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