Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-06
2000-04-11
Fahmy, Wael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438387, 438622, 438672, H01L 218244
Patent
active
060487623
ABSTRACT:
A method of fabricating an embedded dynamic random access memory. Using the method of dual damascence, by forming patterning only one dielectric layer, the contact windows with different depth are formed. In addition, the metal layer formed within the metal connecting regions are used as interconnects without further process.
REFERENCES:
patent: 5627095 (1997-05-01), Koh et al.
patent: 5644151 (1997-07-01), Izumi et al.
patent: 5689126 (1997-11-01), Takaishi
patent: 5702982 (1997-12-01), Lee et al.
patent: 5741741 (1998-04-01), Tseng
patent: 5747369 (1998-05-01), Kantimahanti et al.
patent: 5932928 (1999-08-01), Clampitt
IBM Technical Disclosure Bulletin, vol. 34, No. 7A, Dec. 1991.
Hsia Liang-Choo
Wu H. J.
Coleman William David
Fahmy Wael
United Integrated Circuits Corp.
LandOfFree
Method of fabricating embedded dynamic random access memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating embedded dynamic random access memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating embedded dynamic random access memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1176031