Method of fabricating dual damascene interconnections of...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S618000, C438S620000, C438S624000, C438S634000, C438S637000, C438S638000, C438S639000, C438S640000, C257SE21579

Reexamination Certificate

active

10625007

ABSTRACT:
A method of fabricating dual damascene interconnections is provided. A dual damascene region is formed in a hybrid dielectric layer having a dielectric constant of 3.3 or less, and a carbon-free inorganic material is used as a via filler. The present invention improves electrical properties of dual damascene interconnections and minimizes defects.

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Jiang, P, et al., Trench Etch Processes for Dual Damascene Patterning of Low-kDielectrics, J. Vac. Sci. Technol. A 19(4), Jul./Aug. 2001, pp. 1388-1391.
S. Wolf and R.N. Tauber, Silicon Processing, Lattice Press, vol. 1, p. 171.

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