Method of fabricating dual damascene interconnection and...

Details Method of fabricating dual damascene interconnection and... Method of fabricating dual damascene interconnection and...

2005-01-11

2009-10-06

Sarkar, Asok K (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C257SE21251, C257SE21255, C257SE21301, C257SE21579, C438S745000

Reexamination Certificate

active

07598168

ABSTRACT:
A method of forming a dual damascene semiconductor interconnection and an etchant composition specially adapted for stripping a sacrificial layer in a dual damascene fabrication process without profile damage to a dual damascene pattern are provided. The method includes sequentially forming a first etch stop layer, a first intermetal dielectric, a second intermetal dielectric, and a capping layer on a surface of a semiconductor substrate on which a lower metal wiring is formed; etching the first intermetal dielectric, the second intermetal dielectric, and the capping layer to form a via; forming a sacrificial layer within the via; etching the sacrificial layer, the second intermetal dielectric, and the capping layer to form a trench; removing the sacrificial layer remaining around the via using an etchant composition including NH4F, HF, H2O and a surfactant; and forming an upper metal wiring within the thus formed dual damascene pattern including the via and the trench. The preferred etchant composition for stripping a sacrificial layer in the foregoing dual damascene process consists essentially of NH4F, HF, H2O and a surfactant.

REFERENCES:
patent: 4517106 (1985-05-01), Hopkins et al.
patent: 6057239 (2000-05-01), Wang et al.
patent: 6297149 (2001-10-01), Stamper
patent: 6297178 (2001-10-01), Berbner et al.
patent: 6797194 (2004-09-01), Kikuyama et al.
patent: 6828229 (2004-12-01), Lee et al.
patent: 00-43051 (2000-07-01), None
patent: 10-2001-0040961 (2001-05-01), None
patent: 02-56009 (2002-07-01), None
patent: 10-2002-0085722 (2002-11-01), None

Affiliated with

Also associated with

Rating

Method of fabricating dual damascene interconnection and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating dual damascene interconnection and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating dual damascene interconnection and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4082739