Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-04-28
2000-09-19
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, 438238, H01L 218242
Patent
active
06121082&
ABSTRACT:
A method for fabricating landing pads for DRAM cells is disclosed. The method comprises following steps: At first, a substrate formed with isolation regions, periphery transistor region and a defined DRAM region are patterned so that an oxide layer on the defined DRAM region are removed to expose the source/drain region nitride caps, and nitride spacers. After a polysilicon layer is formed on all resulting surfaces, a photoresist pattern is subsequently formed on the polysilicon layer of the DRAM region so that the photoresist openings over the nitride cap are formed. Next, a conformal polymer layer of about 0.1 .mu.m in thickness is formed on all resulting surfaces so that a smaller polymer opening about 0.1 .mu.m size or beyond is formed in each of the photoresist openings. Finally, using the polymer layer as a mask and the nitride cap as a stopping layer, a polymer etching and a polysilicon etching are performed so that the landing pads are generated.
REFERENCES:
patent: 5681773 (1997-10-01), Tseng
patent: 5766993 (1998-06-01), Tseng
Kuo Mai-Ru
Linliu Kung
Tsai Jey
Worldwide Semiconductor Manufacturing Corp.
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