Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-06
1999-11-09
Kunemund, Robert
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438253, 438254, 438255, 438256, 438396, 438397, 438398, 438399, H01L 2170, H01L 2100
Patent
active
059813342
ABSTRACT:
A method for fabricating DRAM capacitor which includes forming a transistor having a source/drain regions and a gate electrode above a silicon substrate; then, forming sequentially a stack of layers including a first insulating layer, a second insulating layer, a third insulating layer and a hard mask layer over the transistor; subsequently, patterning and etching the hard mask layer. Thereafter, an oxide layer is formed over the hard mask layer, and then portions of the layers are etched to form a capacitor region over the oxide layer and a contact opening exposing a portion of the source/drain region. In the subsequent step, a conducting layer is formed over the oxide layer, the hard mask layer, the sidewalls of the contact opening and the exposed portion of the source/drain region. Next, a polishing method is used to remove the conducting layer above the oxide layer, and then the oxide layer is removed to form a lower electrode. A dielectric layer is then formed over the lower electrode, and finally an upper electrode layer is formed over the dielectric layer.
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Chien Sun-Chieh
Hsue C. C.
Jenq Jason
Anderson Matt
Kunemund Robert
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