Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2010-07-05
2011-11-29
Toledo, Fernando L (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S200000, C438S203000, C438S253000, C438S275000, C257SE21431
Reexamination Certificate
active
08067281
ABSTRACT:
A method of fabricating a CMOS device is provided. First, first and second gates, first and second offset spacers and first and second lightly-doped regions are respectively formed in first and second type metal-oxide-semiconductor regions. A mask layer is respectively formed on the first and second gates. Next, an epitaxial layer is formed in the substrate on two sides of the second gate. Next, first and second spacers, first and second doped regions are formed. Next, a portion of the first spacer is removed to expose a portion of a surface of the first lightly-doped region, thereby forming a first slimmed spacer. Next, a coating layer containing silicon is formed to cover the exposed first lightly-doped region, the first and second doped regions. Next, the mask layer is removed. Next, a metal silicide layer is formed on the first and second gates and the silicon layer.
REFERENCES:
patent: 2007/0128783 (2007-06-01), Ting et al.
Chi Hwan Jang, Dong Ok Shin, Sung II Baik, Young-Woon Kim, Young-Joo Song, Kyu-Hwan Shim and Nae-Eung Lee, “Formation of Nickel Silicide Layer on Strained-Si0.83Ge0.17/Si(001) using a Sacrificial Si Layer and its Morphological Instability”, 2005, vol. 44, pp. 4805-4813, the Japan Society of Applied Physics.
Chen Yi-Wei
Ho Nien-Ting
Huang Chien-Chung
Lai Kuo-Chih
King Justin
Lee Kyoung
Toledo Fernando L
United Microelectronics Corp.
WPAT. P.C.
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