Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-06-29
2000-08-08
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438254, 438396, 438397, H01L 218242
Patent
active
061001368
ABSTRACT:
A method of forming a capacitor. A substrate comprises a cell array area and a peripheral area. A dielectric layer is formed on the substrate. The covering layer is formed on the dielectric layer. The contact electrode is formed through the dielectric layer and the covering layer. The first oxide layer is formed over the substrate. A portion of the first oxide layer is removed to form an opening, which exposes the contact electrode. A conformal preserve layer is formed over the substrate. A second oxide layer is formed over the substrate. A portion of the second oxide layer in the cell array area is removed to form an opening, which exposes the contact electrode. A conformal first conductive layer is formed over the substrate to cover the second oxide layer and the opening. A third oxide layer is formed over the substrate to cover the first conductive layer and fill the opening. A planarization step is performed to remove the third oxide layer, the first conductive layer, and the second oxide layer until the preserve layer in the peripheral area is exposed. The third oxide layer and the second oxide layer in the cell array area are removed to expose conductive layer. A selective hemispherical grained silicon layer and a dielectric film are formed in sequence over the exposed conductive layer. A second conductive layer is formed over the substrate to fill the opening.
REFERENCES:
patent: 5488011 (1996-01-01), Figura et al.
patent: 5650351 (1997-07-01), Wu
patent: 5652165 (1997-07-01), Lu et al.
patent: 5895250 (1999-04-01), Wu
Lin Dahcheng
Yu Chih-Hsing
Huang Jiawei
Monin, Jr. Donald L.
Pham Hoai
Worldwide Semiconductor Manufacturing Corp.
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