Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-01-10
2008-10-07
Lebentritt, Michael S. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S222000, C438S225000, C438S226000, C257SE21633, C257SE21634
Reexamination Certificate
active
07432167
ABSTRACT:
The present invention provides a method of fabricating strained silicon channel MOS transistor, comprising providing a substrate, forming at least a gate structure on the substrate, forming a mask layer on the gate structure, performing an etching process to form two recesses corresponding to the gate structure within the substrate, performing a selective epitaxial growth (SEG) process to form an epitaxial layer in the recesses respectively, and performing an ion implantation process for the epitaxial layers to form a source/drain region.
REFERENCES:
patent: 7342284 (2008-03-01), Ting et al.
patent: 2007/0072353 (2007-03-01), Wu et al.
patent: 2007/0128783 (2007-06-01), Ting et al.
patent: 2007/0187727 (2007-08-01), Ting et al.
Ahmadi Mohsen
Hsu Winston
Lebentritt Michael S.
United Microelectronics Corp.
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