Method of fabricating a stacked capacitor of a dynamic random ac

Details Method of fabricating a stacked capacitor of a dynamic random ac Method of fabricating a stacked capacitor of a dynamic random ac

1997-10-17

1999-05-11

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438254, 438649, H01L21/8242

Patent

active

059021233

ABSTRACT:
A method of forming a stacked capacitor of a DRAM. A number of doped polysilicon layers and a number of tungsten silicide layers are alternately formed. The doped polysilicon layers and the tungsten silicide layers are then patterned to form a lower electrode of the stacked capacitor. The doped polysilicon layers and the tungsten silicide layers are selectively etched to form a number of lateral trenches at the sidewall of the lower electrode so that the surface area of the lower electrode is increased. A dielectric layer is formed over the exposed surface of the doped polysilicon layers and the tungsten silicide layers. A conductive layer is formed on the dielectric layer as an upper electrode of the stacked capacitor so that the stacked capacitor is completed.

REFERENCES:
patent: 5286668 (1994-02-01), Chou
patent: 5416037 (1995-05-01), Sato et al.
patent: 5478769 (1995-12-01), Lim

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