Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-19
2000-08-01
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438266, H01L 218247
Patent
active
060966033
ABSTRACT:
On a substrate, there is at least a first split gate and a second split gate. A dielectric layer is then formed on the substrate to cover the first split gate and the second split gate. The dielectric layer is patterned so that the dielectric layer covers at least a portion of the first split gate, a portion of the second split gate and a common source region between the first split gate and the second split gate. A polysilicon layer is formed on the dielectric layer. The polysilicon layer is then patterned.
REFERENCES:
patent: 5656527 (1997-08-01), Choi et al.
patent: 5856223 (1999-01-01), Wang
Chang Ko-Hsing
Juo Kuo-Hao
Chaudhari Chandra
Worldwide Semiconductor Manufacturing Corp.
LandOfFree
Method of fabricating a split gate structure of a flash memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a split gate structure of a flash memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a split gate structure of a flash memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-663119