Method of fabricating a split gate structure of a flash memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438266, H01L 218247

Patent

active

060966033

ABSTRACT:
On a substrate, there is at least a first split gate and a second split gate. A dielectric layer is then formed on the substrate to cover the first split gate and the second split gate. The dielectric layer is patterned so that the dielectric layer covers at least a portion of the first split gate, a portion of the second split gate and a common source region between the first split gate and the second split gate. A polysilicon layer is formed on the dielectric layer. The polysilicon layer is then patterned.

REFERENCES:
patent: 5656527 (1997-08-01), Choi et al.
patent: 5856223 (1999-01-01), Wang

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