Method of fabricating a semiconductor device with a channel...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21676

Reexamination Certificate

active

07989292

ABSTRACT:
In a method of fabricating a semiconductor device on a substrate which includes a plurality of pillar patterns, an impurity region between adjacent pillar patterns, a gate electrode on each pillar pattern, a first capping layer covering the gate electrode, and a separation layer covering the first capping layer between the gate electrodes of adjacent pillar patterns, the first capping layer is removed except for a portion contacting the separation layer, a sacrificial layer is formed to cover the gate electrode, a second capping layer is formed on sidewalls of each pillar pattern, the sacrificial layer is removed and a word line connecting the gate electrodes of the adjacent pillar patterns is formed. In the manufactured device, the first capping layer isolates the impurity region from the word line and the second capping region prevents the sidewalls of the respective pillar pattern from being exposed.

REFERENCES:
patent: 5895273 (1999-04-01), Burns et al.
patent: 2007/0009140 (2007-01-01), Jitsui et al.
patent: 2007/0082448 (2007-04-01), Kim et al.
patent: 1020060041415 (2006-05-01), None
Korean Notice of Allowance for Korean patent application No. 10-2008-0030166, citing the attached references.

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