Method of fabricating a semiconductor device including complemen

Details Method of fabricating a semiconductor device including complemen Method of fabricating a semiconductor device including complemen

1998-05-12

2000-01-25

Fahmy, Wael M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438200, 438209, 438279, 438286, 148DIG126, H01L 218234

Patent

active

060177977

ABSTRACT:
There is provided a method of fabricating a semiconductor device including, a first conductivity type MOSFET, a second conductivity type MOSFET, and a power MOSFET having a high breakdown voltage, and having a drain offset region formed in the substrate between the drain region and a channel region located below the gate electrode, and containing first conductivity type impurities therein at such a concentration that carriers are depleted in an operation of the semiconductor device, the method including the steps, in sequence, of (a) forming gate electrodes on the substrate in first, second and third regions where the first conductivity type MOSFET, the second conductivity type MOSFET, and the power MOSFET are to be fabricated, respectively, (b) introducing first conductivity type impurities into the substrate at such a concentration that carriers are depleted in an operation of the semiconductor device, (c) introducing first conductivity type impurities into the substrate with both the second region and a region where the drain offset region is to be formed being masked with a photoresist film, and (d) introducing second conductivity type impurities into the substrate with both the first and third regions being masked with a photoresist film. The first conductivity type impurities in the step (b) is lower in concentration than the second conductivity type impurities and the first conductivity type impurities in the step (c). The method makes it possible to form CMOS and a power MOSFET on a common substrate without increasing the number of steps of forming a mask or a photoresist film in comparison with a conventional method of fabricating CMOS.

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Huang, Q., "Monolithic integration of . . . high-voltage devices", IEEE Electron Device Letters, pp. 575-577, vol. 13, Issue 11, Nov. 1992.

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