Method of fabricating a semiconductor device by filling gaps...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S618000, C438S675000, C438S763000, C438S782000, C438S787000, C438S791000

Reexamination Certificate

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06541358

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device fabrication method and more particularly relates to a semiconductor device fabrication method of a semiconductor device bearing SOG (Spin-on Glass) containing a large quantity of hydrogen as an interlaminar insulation film to bury gaps of gate electrodes and to a semiconductor device.
2. Description of the Prior Art
Following recent advancement of highly intense integration of IC, a gap between gate electrodes has been narrowed. Especially, since a DRAM is so fabricated as to have a self-alignment contact structure and gate electrodes coated with a SiN film, an aspect ratio of gate electrodes further becomes high.
For that, in the case of an insulation film, an oxide film of such as BPSG (an oxide film containing phosphorus and boron) formed by a chemical vapor deposition (a CVD method) in the past, since voids are formed in the film, it is becoming difficult to bury the insulation film between neighboring gate electrodes.
An example as a method capable of burying an insulation film free from voids in such a narrow gap between gate electrodes includes a method of employing SOG (Spin-on Glass), which is a flat coating film, for burying.
For example, applicable is a method disclosed in Japanese Patent Laid-Open No. 6-97302 of applying SOG with a low viscosity.
However, although it is excellent to be buried, SOG has a high wet etching ratio, therefore its quality is inferior as compared with that of a CVD film of such as a conventional BPSG or the like.
Further, as the intrinsic properties of the SOG film, the parts buried in recessed parts cannot sufficiently be shrunk to result in the sparse film quality as compared with that in flat parts other than in the recessed parts.
That is, if SOG is used as an insulation film to fill the gaps between neighboring insulation films, the film quality becomes sparse only in the gaps between neighboring insulation films. Therefore, there is occurred such a problem that only the SOG between the neighboring gate electrodes is etched by treatment with diluted hydrofluoric acid, a pretreatment for plug electrode formation, after contact hole formation and it results in occurrence of short circuit if the plug electrode formation is carried out in such a state.
BRIEF SUMMARY OF THE INVENTION
OBJECT OF THE INVENTION
The purpose of the present invention is to provide a semiconductor device fabrication method capable of providing the excellent contact shape and the excellent contact resistance properties.
SUMMARY OF THE INVENTION
The semiconductor device fabrication method of the present invention includes: a step of forming an insulation film on a semiconductor substrate on which a plurality of gate electrodes are formed; a step of applying SOG of HSQ type on the insulation film; a first firing step of firing the resulting substrate at a first temperature in nitrogen atmosphere; a step of forming an oxide film on the SOG of the HSQ type by a CVD method; a step of forming contact holes to expose the semiconductor substrate by removing the insulation film, the SOG of the HSQ type and the oxide film in the regions among a plurality of the gate electrodes; and a second firing step of firing the resulting substrate after the first contact hole formation at a second temperature higher than the first temperature.


REFERENCES:
patent: 5855962 (1999-01-01), Cote et al.
patent: 5976966 (1999-11-01), Inoue
patent: 6117785 (2000-09-01), Lee et al.
patent: 6297125 (2001-10-01), Nag et al.
patent: 6-97302 (1994-04-01), None

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