Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-12-26
2009-12-29
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S151000, C438S211000, C438S735000, C438S736000, C438S655000, C438S664000, C438S682000, C257SE21199, C257SE21438
Reexamination Certificate
active
07638384
ABSTRACT:
Embodiments relate to a method of fabricating a semiconductor device. In embodiments, a gate pattern may be formed on a semiconductor substrate, and sidewalls having a lower height than a height of the gate pattern may be formed at both sides of the gate pattern using a photoresist pattern. A silicide layer may be formed on exposed upper surface and side surfaces of the gate pattern and a portion of the semiconductor substrate at both sides of the sidewalls. Therefore, the silicide layer formed on a gate may be enlarged, and may reduce gate resistance.
REFERENCES:
patent: 6043545 (2000-03-01), Tseng et al.
patent: 6162691 (2000-12-01), Huang
patent: 6169017 (2001-01-01), Lee
patent: 2001/0019156 (2001-09-01), Matsuo et al.
patent: 2004/0132274 (2004-07-01), Jun et al.
Dongbu Hi-Tek Co., Ltd.
Pham Thanh V
Sherr & Vaughn, PLLC
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