Method of fabricating a semiconductor device

Details Method of fabricating a semiconductor device Method of fabricating a semiconductor device

1999-08-05

2001-04-24

Kunemund, Robert (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S702000, C438S740000

Reexamination Certificate

active

06221778

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and, more particularly, to an oxidation process in forming a gate electrode of a semiconductor device.
2. Description of the Related Art
Referring to
FIG. 1A
, a device isolation region
12
defining an active region and an inactive region is formed on a semiconductor substrate
10
. A polysilicon layer
14
a,
a tungsten silicide layer
14
b,
and a mask nitride layer
14
c
are sequentially formed on a gate oxide layer (not shown) on the semiconductor substrate
10
.
Using a mask for forming a gate electrode, the mask nitride layer
14
c,
the tungsten silicide layer
14
b,
and the polysilicon layer
14
a
are sequentially etched to form a gate electrode. In order to compensate for damage generated on an upper portion and both sidewalls of the gate electrode
14
and the semiconductor substrate
10
during formation of the gate electrode
14
, a first oxide layer
16
is formed on the semiconductor substrate
10
and the gate electrode
14
by a thermal oxidation process.
Referring to FIG.
1
B and
FIG. 1C
, a nitride layer
18
is formed over the entire surface of the semiconductor substrate
10
and the first oxide layer
16
. The nitride layer
18
is then etched back to form a nitride layer spacer
18
a
on sidewalls of the gate electrode
14
. In order to compensate for damage generated on the gate oxide layer and the semiconductor substrate
10
during dry etch for forming the nitride layer spacer
18
a,
a second oxide layer
20
is formed on the semiconductor substrate
10
and the gate electrode
14
by the thermal oxidation process.
Owing to the first oxide layer
16
and the second oxide layer
20
, the amount of oxidization of the active region of the semiconductor substrate
10
is increased to expand the volume. Owing to the expansion of the volume, the active region is attacked to generate pit-type defect
22
such as a pit. This may generate the fail, thereby reducing the yield of products.
SUMMARY OF THE INVENTION
The present invention is directed to overcoming or at least reducing the effect of the problem set forth above.
A feature of the present invention is to provide a method for fabricating a semiconductor device that volume expansion of an active region of a semiconductor substrate is suppressed to remove pit-type defects.
These and other features of this invention are accomplished by forming a plurality of spaced-apart gate electrodes with a capping insulator thereon on a semiconductor substrate, growing an oxide layer by a thermal oxidation process on the semiconductor substrate including the gate electrodes, forming a nitride layer on the thermal oxide layer, etching the nitride layer to form a spacer on sidewalls of the gate electrodes; and depositing a CVD oxide layer. The CVD oxide layer may be made of a high temperature oxide. The method may further comprise forming an etching stopper nitride layer on the CVD oxide layer, depositing a second oxide layer to fill spaces between the gate electrodes, and etching the second oxide, the etching stopper nitride, and the thermal oxide layers to form contacts exposing the semiconductor substrate between the gate electrodes, wherein the CVD oxide layer serves as a buffer layer between the semiconductor substrate and the etching stopper nitride layer.
According to this invention, a conductive layer for forming a gate electrode and a first insulating layer are sequentially formed on a semiconductor substrate wherein an active region and an inactive region are defined. Using a mask for forming a gate electrode, the first insulating layer and the conductive layer are sequentially etched to form a gate electrode. A second insulating layer and a third insulating layer are sequentially formed on the gate electrode and a surface of the semiconductor substrate. The third insulating layer is dry etched to form an insulating layer spacer on sidewalls of the gate electrode. Finally, a fourth insulating layer is formed on the structure of the semiconductor substrate including the gate electrode by a deposition process. That is, after forming an insulating layer spacer on sidewalls of the gate electrode, a high temperature oxide layer is formed by a deposition process so as to compensate for damage at the surface of the semiconductor device. As a result, amount of oxidization is reduced to suppress volume expansion of the active region of the semiconductor substrate, thereby effectively removing pits from the semiconductor device.


REFERENCES:
patent: 5141884 (1992-08-01), Kwon et al.
patent: 5900666 (1999-05-01), Gardner et al.
patent: 5933741 (1999-08-01), Tseng
patent: 5972760 (1999-10-01), Ju
patent: 5989966 (1999-11-01), Huang

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