Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned
Reexamination Certificate
1999-09-22
2001-04-17
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Self-aligned
C438S309000, C438S320000, C438S341000, C438S369000
Reexamination Certificate
active
06218254
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to a method of fabricating a bipolar junction transistor in silicon carbide, and in particular relates to a method of fabricating a bipolar junction transistor in silicon carbide wherein the base and emitter contacts are self-aligned, and devices resulting therefrom.
2. Description of the Related Art
The bipolar junction transistor (BJT) is a well-known and frequently used semiconductor electronic device. A bipolar junction transistor is generally defined as a device formed of a semiconductor material having two opposing p-n junctions in close proximity to one another. Because of their respective structures and conductivity types, bipolar junction transistors are generally referred to as n-p-n or p-n-p transistors.
In the operation of an n-p-n BJT, current carriers enters a region of the semiconductor material adjacent one of the p-n junctions which is called the emitter. Most of the charge carriers exit the device from a region of the semiconductor material adjacent the other p-n junction which is called the collector. The collector and emitter have the same conductivity type, either p or n. A small portion of semiconductor material known as the base, having the opposite conductivity type (either p or n) from the collector and the emitter, is positioned between the collector and the emitter. The BJT's two p-n junctions are formed where the collector meets the base and where the base meets the emitter.
When current is injected into or extracted from the base, depending upon whether the BJT is n-p-n or p-n-p, the flow of charge carriers (i.e. electrons or holes) which can move from the collector to the emitter is greatly affected. Typically, small currents applied to the base can control proportionally larger currents passing through the BJT, giving it its usefulness as a component of electronic circuits. The structure and operation of BJTs are described in detail in B. Streetman, SOLID STATE ELECTRONIC DEVICES, 2d ed. (1980), chapter 7.
One of the requirements for an operable and useful bipolar junction transistor is an appropriate semiconductor material from which it can be formed. The most commonly used semiconductor material is silicon (Si), although attention has been given to other semiconductor materials such as gallium arsenide (GaAs) and indium phosphide (InP). For given circumstances and operations, these materials all have appropriate applications.
Another candidate material for bipolar junction transistors is silicon carbide (SiC). Silicon carbide has well-known advantageous semiconductor characteristics: a wide bandgap, a high electric field breakdown strength, a reasonably high electron mobility, a high thermal conductivity, a high melting point, and a high saturated electron drift velocity. Taken together, these qualities mean that, as compared to devices formed in other semiconductor materials, electronic devices formed in silicon carbide have the capability of operating at higher temperatures, at high power densities, at high speeds, at high power levels and even under high radiation densities.
Due to their ability to function at high frequencies, high temperatures, and high power levels, silicon carbide transistors are highly desirable for use in applications such as high power radio frequency transmitters for radar and communications, for high power switching applications, and for high temperature operations such as jet engine control. Accordingly, methods of producing device quality silicon carbide and devices formed from silicon carbide have been of interest to scientists and engineers for several decades.
Silicon carbide crystallizes in over 150 different polytypes, or crystal structures, of which the most common are designated
3
C,
4
H and
6
H where “C” stands for “cubic” and “H” for “hexagonal.” At the present time, the
6
H polytype is the most thoroughly characterized, but the
4
H polytype is more attractive for power devices because of its higher electron mobility.
At present time, silicon carbide is a difficult material to fabricate devices with. Silicon carbide's high melting point renders techniques such as alloying and diffusion of dopants more difficult, usually because a number of the other materials necessary to perform such operations tend to break down at the high temperatures required to affect silicon carbide. Silicon carbide is also an extremely hard material, and indeed its most common use is as an abrasive. Attempts have been made with some success in manufacturing junctions, diodes, transistors and other devices from silicon carbide. One example of a bipolar junction transistor is disclosed in Palmour et al., U.S. Pat. No. 4,945,394, which is incorporated herein by reference in its entirety. Palmour et al. disclose a bipolar junction transistor formed in silicon carbide wherein the base and emitter are formed as wells using high temperature ion implantation. However, since the emitter and base regions are formed using photolithographic techniques, the precision with which the base and emitter regions may be spaced is limited; typically the spacing must be about 1-5 &mgr;m or more using conventional lithographic techniques (with about 2 &mgr;m being most typical), which may result in undesirably high base resistance, and also in unwanted base-collector capacitance, both of which reduce the ability of the device to operate at high frequencies. Moreover, since bipolar devices in silicon carbide exhibit relatively short minority carrier lifetimes, typically 40 nsec-3 sec, it is imperative that the physical dimensions of such devices be tightly controlled.
Self alignment techniques, i.e. manufacturing techniques through which device features automatically and inherently align as a result of the manufacturing process, have been used to produce silicon carbide MOSFETs. For example, U.S. Pat. No. 5,726,463, which is incorporated herein by reference in its entirety, discloses a silicon carbide MOSFET having a self-aligned gate structure in which self-alignment of the gate contacts is achieved by filling steep-walled grooves with conductive gate material over a thin oxide layer, and applying contacts to the gate material through windows opened in a dielectric layer. Such techniques are designed to reduce stray capacitance by reducing the overlap of the gate contacts with the drain and source regions, and are thus not applicable to the fabrication of bipolar junction transistors.
Accordingly, there is a need in the art for a method of fabricating a bipolar junction transistor in silicon carbide which enables precise and close spacing of the base and emitter contacts.
OBJECTS AND SUMMARY OF THE INVENTION
It is an object of the present invention to enable precise and close spacing of the base and emitter contacts in a bipolar junction transistor formed in silicon carbide.
It is a further object of the present invention to simplify the process of fabricating a bipolar junction transistor in silicon carbide.
A still further object of the invention is to reduce the number of photolithographic steps required to fabricate a bipolar junction transistor in silicon carbide.
According to the present invention, the foregoing and other objects are attained by a method of fabricating a self-aligned bipolar junction transistor in a semiconductor structure having a first layer of silicon carbide generally having a first conductivity type and a second layer of silicon carbide generally having a second conductivity type, opposite to the first conductivity type.
The method comprises forming a trench in the second silicon carbide layer, the trench having a bottom wall and opposing side walls, forming an oxide spacer layer having a predetermined thickness on the second semiconductor layer, including the bottom wall and side walls of the trench. After formation of the oxide spacer layer, the oxide spacer layer on a portion of the bottom wall of the trench between the side walls is anisotropically etched while at least a portion of the oxide spacer layer remains on the side walls, thereby
Agarwal Anant K.
Ryu Sei-Hyung
Singh Ranbir
Cree Research Inc.
Hall, Esq. David C.
Lattin Christopher
Myers Bigel & Sibley & Sajovec
Niebling John F.
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