Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-10-28
2001-04-24
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S421000, C438S422000, C438S625000, C438S629000, C438S626000, C438S642000, C438S644000, C438S645000, C438S648000, C438S652000, C438S654000, C438S656000, C438S672000, C438S685000, C438S688000, C438S680000
Reexamination Certificate
active
06221754
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a semiconductor fabricating method. More particularly, the present invention relates to a method of forming interconnects.
2. Description of Related Art
Tungsten plugs are widely used for interconnections of Very Large Scale Integration (VLSI). Because of the poor step coverage ability of tungsten, holes are often formed in the tungsten plug while forming a tungsten plug. Therefore, in the step of performing chemical mechanical polishing (CMP) method, slurry often fills the holes in the plug. The slurry easily reacts with tungsten, and thus the reliability of tungsten plug is reduced.
FIGS. 1A through 1C
are cross-sectional views of a portion of a semiconductor device showing steps in a conventional process for forming a plug.
In
FIG. 1A
, a substrate
100
is provided. A metallic layer
104
is formed on the substrate
100
. The metallic layer
104
is used to electrically couple with the other regions. A dielectric layer
102
is formed on the substrate
100
. The dielectric layer
102
is etched by conventional microphotography and etching processes. An opening
106
is formed in the dielectric layer
102
. The opening
106
exposes the metallic layer
104
.
In
FIG. 1B
, a tungsten layer
122
is formed on the substrate
100
. The surface of the tungsten layer
122
is about 5000 Å higher than the surface of the dielectric layer
102
. In other words, the thickness
124
of the tungsten layer
122
is about 5000 Å. The tungsten layer
122
is sufficient to fill the opening
106
. Because of the poor step coverage ability of the tungsten, a hole
108
is formed in the tungsten plug.
In
FIG. 1C
, a portion of the tungsten layer
122
on the surface of the dielectric layer
102
is removed by using chemical mechanical polishing. A tungsten plug
122
a
is formed. An over-polishing method is performed to prevent any portion of the tungsten layer
122
from remaining on the dielectric layer
102
. A dished surface
152
is formed on the surface of the tungsten plug
122
a.
If the hole
108
is large enough, it is easy for the hole
108
to connect with the dished surface
152
to form a hole opening
130
. The hole opening
130
exposes the hole
108
. At the same time, slurry
132
easily fills the hole
108
through the hole opening
130
. The slurry
132
, which fills the hole
108
, may react with the tungsten plug
122
a.
Hence, the hole
108
is enlarged. The quality and reliability of the tungsten plug
122
a
thus are reduced. Furthermore, the cost of the chemical mechanical polishing method is expensive. Using chemical mechanical polishing to remove a tungsten layer of about 5000 Å in thickness costs a lot.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method of fabricating a plug comprising the steps of etching back the first plug material layer to form a dished surface on the first plug material layer at a depth of about 1000 Å. A second coverage step is performed. A second plug material layer is formed to fill the dished surface and a hole. Thus, the slurry cannot fill the hole while a chemical mechanical polishing is performed. The slurry cannot react with the plug material or the first metallic layer. The reliability of the plug according to the present invention is increased. The thickness of the second plug material layer is thinner than the plug material layer of the conventional method. The thickness is decreased by about 60% when compared with the conventional method. The fabricating cost is decreased.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides the steps of providing a substrate. A dielectric layer is formed on the substrate. The dielectric layer has an opening therein. The dielectric layer exposes a region, which is used to electrically couple with the other regions. A first coverage step is performed to form a first plug material layer on the substrate. The first plug material layer is sufficient to fill the opening. The first plug material layer and a portion of the first plug material on the dielectric layer is removed to form a dished surface on the surface of the opening. A second coverage is performed to form a second plug material layer on the substrate. The second plug material layer is sufficient to fill the dished surface. A chemical mechanical polishing method is performed to removed the second plug material layer on the dielectric layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5260232 (1993-11-01), Muroyama et al.
patent: 5747379 (1998-05-01), Huang et al.
patent: 5970377 (1999-10-01), Park
patent: 5976975 (1999-11-01), Joshi et al.
Chiou J. C.
Chou Hsiao-Pang
Niebling John F.
United Microelectronics Corp.
Zarneke David A
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