Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-01-28
2008-09-30
Vu, Hung (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S618000, C438S622000
Reexamination Certificate
active
07429528
ABSTRACT:
An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed.
REFERENCES:
patent: 6100589 (2000-08-01), Tanaka
patent: 6707156 (2004-03-01), Suzuki et al.
Communication from Taiwanese application No. 93114432 which was mailed on Feb. 9, 2006.
Examiner's Answer from U.S. Appl. No. 11/067,551 which was mailed on Apr. 5, 2007.
Decision on Appeal from U.S. Appl. No. 10/633,004 which was mailed on Mar. 27, 2008.
Greco Joseph David
Marks Howard Lee
Singh Inderjit
NVIDIA Corporation
Vu Hung
Zilka-Kotab, PC
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