Method of fabricating a non-volatile memory

Details Method of fabricating a non-volatile memory Method of fabricating a non-volatile memory

2007-02-27

2007-02-27

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S258000, C438S259000, C438S260000, C438S261000, C438S262000, C438S263000, C438S264000, C438S265000, C438S266000, C438S267000, C438S954000, C438S591000, C438S592000, C438S593000, C438S594000, C257SE21613, C257SE21665, C257SE21633

Reexamination Certificate

active

11148851

ABSTRACT:
A method of fabricating a nonvolatile memory is provided. The method includes forming a bottom dielectric layer, a charge trapping layer, a top dielectric layer and a conductive layer on the substrate sequentially. Portions of conductive layer, top dielectric layer, charge trapping layer and bottom dielectric layer are removed to form several trenches. An insulation layer is formed in the trenches to form a plurality of isolation structures. A plurality of word lines are formed on the conductive layer and the isolation structures. By using the word lines as a mask, portions of bottom dielectric layer, charge trapping layer, top dielectric layer, conductive layer and isolation structures are removed to form a plurality of devices. The bottom oxide layer has different thickness on the substrate so that these devices can be provided with different performance. These devices serve as memory cells with different character or devices in periphery region.

REFERENCES:
patent: 6436800 (2002-08-01), Kuo et al.
patent: 2003/0203594 (2003-10-01), Shimizu et al.
patent: 2004/0212019 (2004-10-01), Shinohara et al.

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