Method of fabricating a MOS transistor with a raised source/drai

Details Method of fabricating a MOS transistor with a raised source/drai Method of fabricating a MOS transistor with a raised source/drai

1997-12-31

2000-09-19

Pham, Long

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438231, 438232, 438307, 257336, 257344, H01L 21336

Patent

active

061211001

ABSTRACT:
A method of forming a MOS transistor. According to the method of the present invention, a pair of source/drain contact regions are formed on opposite sides of a gate electrode. After forming the pair of source/drain contact regions, semiconductor material is deposited onto opposite sides of the gate electrode. Dopants are then diffused from the semiconductor material into the substrate beneath the gate electrode to form a pair of source/drain extensions.

REFERENCES:
patent: 5504023 (1996-04-01), Hong
patent: 5534447 (1996-07-01), Hong
patent: 5710450 (1998-01-01), Chau et al.
patent: 5908313 (1999-06-01), Chau et al.

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