Method of fabricating a low base-resistance bipolar transistor

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S317000, C438S320000, C438S343000

Reexamination Certificate

active

06271097

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor devices, and more specifically to heterojunction bipolar transistors.
BACKGROUND OF THE INVENTION
Heterojunction bipolar transistors (HBTs) are attractive devices for such applications as amplifiers for personal communications and radar systems, and as switching devices in products such as analog-to-digital converters. The maximum frequency of oscillation of GaAs-based HBTs can be five times higher than that of silicon bipolar transistors. In addition, since HBTs are vertical devices, they possess a superior packing density as compared to GaAs MESFETs. Despite these advantages over silicon bipolar and even GaAs FET technologies, GaAs-based HBTs have been shown to suffer from a lower current gain than should be expected from this type of device.
A typical prior-art mesa HBT is shown in
FIG. 1
a
. In mesa HBTs the base metal contact
10
is placed as dose to the emitter contact
12
as possible in order to reduce the extrinsic base resistance. The extrinsic base is the portion of the base layer
14
that lies outside the bounds of the emitter layer
16
. In general, the closer the base contacts
10
are to the emitter
16
, the lower the base resistance. While this approach can lower the base resistance of a transistor, it can also result in reduced HBT current gains. The base ohmic contact
10
represents an infinite surface recombination velocity for carriers injected from the emitter
16
, resulting in an increase in the base current and a reduction in current gain. It has been shown that the HBT current gain decreases as the lateral spacing between the base contact
10
and the emitter contact
12
is decreased below approximately 1 &mgr;m. See Won-Seong Lee, et al.,
Effect of Emitter
-
Base Spacing on the Current Gain of AlGaAs/GaAs Heterojunction Bipolar Transistors,
IEEE Electron Device Letters, Vol. 10, No. 5, May 1989, and Yoshiko Someya, et al.,
Two
-
Dimensional Analysis of the Surface Recombination Effect on Current Gain for GaAlAs/GaAs HBTs,
IEEE Transactions on Electron Devices, Vol. 35, No. 7, July 1988.
The transistor current gain is also dependent upon base layer doping and thickness. For high current gains, the base layer is generally lightly doped and very thin. This configuration contrasts with the need to have low base resistance, which generally requires high base layer doping and a thicker base layer. The practice of moving the base contact metallization further from the emitter contact for improved current gains is not suitable in transistors having lightly doped base layers because of the unacceptable increase in extrinsic base resistance. A compromise is usually made between these conflicting requirements.
In the past, efforts have been made to increase transistor current gain by minimizing the recombination at the extrinsic base surface 18. In these approaches a physical or chemical passivation treatment is applied to the surface of the base layer of the HBT. See O. Nakajima, et al., “Emitter-Base Junction Size Effect on Current Gain H
fe
of AlGaAs/GaAs Heterojunction Bipolar Transistors”,
Japanese Journal of Applied Physics,
Vol. 24, No. 8, pp. L596-L598, Aug. 1985; R. J. Malik, et al., “Submicron Scaling of AlGaAs/GaAs Self-aligned Thin Emitter Heterojunction Bipolar Transistors with Current Gain Independent of Emitter Area”,
Electronics Letters,
Vol. 25, No. 17, pp. 1175-1177, Aug. 17, 1989; S. Tiwari, et al., “Surface Recombination in GaAlAs/GaAs Heterostructure Bipolar Transistors”,
Journal of Applied Physics,
Vol. 64, No. 10, pp. 5009-5012, Nov. 15, 1988. In Lee, supra, a ledge of AlGaAs
30
, part of the emitter
26
of the HBT, is left between the emitter
26
and base contact
20
to passivate the surface of the base layer
24
as shown in
FIG. 1
b
. The wider this AlGaAs passivating ring (up to about 1 &mgr;m in width), the higher the HBT current gain. However, this passivating AlGaAs ring increases the space between the base 20 and emitter 22 contacts with a corresponding increase in the base extrinsic resistance. Consequently, there is a need in the industry for transistors, and processes for making such transistors, that address these shortcomings of the prior art.
SUMMARY OF THE INVENTION
In accordance with the principles of the present invention, there is disclosed herein a method for fabricating a bipolar transistor comprising the steps of: implanting portions of a semiconductor material structure with ions to render the portions semi-insulating; forming an emitter contact region at an exposed surface of a base layer in a non-implanted portion of the material structure; forming an epitaxial layer of semiconductor material over the exposed surface in an implanted portion of the material structure; and forming a base contact over the epitaxial layer. In accordance with one embodiment of the invention, the method includes the further step of forming a second epitaxial layer of semiconductor material over the first epitaxial layer and then forming the base contact on the second epitaxial layer. In accordance with another embodiment, the method includes the further step of forming a second layer of epitaxial material over the exposed surface prior to forming the epitaxial layer of semiconductor material. The base layer may be GaAs and the layer of wide bandgap semiconductor material may be AlGaAs. The second epitaxial layer may also be GaAs.
In another embodiment of the invention, a bipolar transistor is disclosed comprising: an emitter contact region at an exposed surface of a base layer; semi-insulating regions adjacent the emitter contact region; an epitaxial layer of wide bandgap semiconductor material over the semi-insulating regions; and a base contact over the wide bandgap semiconductor material layer. In one embodiment the transistor further comprises a second epitaxial layer of semiconductor material interposed between the layer of wide bandgap material and the base contact. In another embodiment, the transistor further comprises a second epitaxial layer of semiconductor material interposed between the semi-insulating regions and the layer of wide bandgap material. In these embodiments, the base layer may be GaAs and the wide bandgap material may be AlGaAs. An advantage of the invention is that it permits a reduction in base-collector capacitance without the increase in base resistance that normally occurs with ion implantation processes.


REFERENCES:
patent: 4751195 (1988-06-01), Kawai
patent: 4983532 (1991-01-01), Mitani et al.
patent: 5019524 (1991-05-01), Mitani et al.
patent: 5021361 (1991-06-01), Kinoshita et al.
patent: 5106766 (1992-04-01), Lunardi et al.
patent: 5124270 (1992-06-01), Morizuka
patent: 5147775 (1992-09-01), Ota et al.
patent: 5166083 (1992-11-01), Bayraktaroglu
patent: 5284783 (1994-02-01), Ishikawa et al.
patent: 5298439 (1994-03-01), Liu et al.
patent: 5321302 (1994-06-01), Shimawaki
patent: 5345097 (1994-09-01), Nakagawa
patent: 5624853 (1997-04-01), Shikata
patent: 5665614 (1997-09-01), Hafizi et al.
patent: 5739062 (1998-04-01), Yoshida et al.
patent: 5767540 (1998-06-01), Shimizu
patent: 5789301 (1998-08-01), Hill
patent: 5840612 (1998-11-01), Oki et al.
patent: 6159816 (2000-12-01), Hill et al.
Yang-Hua Chang, “Design Study of Passivation Ledge in AlGaAs/GaAs Heterojunction Bipolar Transistors”, IEEE, 1995.*
Nobuyuki Hayama and Kazuhiko Honjo, “1/f Noise Reduction in Self-Aligned AlGaAs/GaAs HBT with AlGaAs Surface Passivation Layer”, IEEE Transactions on Electron Device, vol. 39, No. 9, 1992.*
Nobuyuki Hayama and Kazuhiko Honjo, “Emitter Size Effect on Current gain in fully self-Aligned AlGaAs/GaAs HBT's with AlGaAs Surface Passivation Layer”, IEEE Electron Device Letters, vol. 11, No. 9, 1990).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of fabricating a low base-resistance bipolar transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating a low base-resistance bipolar transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a low base-resistance bipolar transistor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2513886

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.