Method of fabricating a high quality thin oxide

Details Method of fabricating a high quality thin oxide Method of fabricating a high quality thin oxide

1998-12-18

2001-02-20

Pham, Long (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S263000, C438S264000

Reexamination Certificate

active

06190973

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to fabrication of semiconductor devices, and more specifically, to methods for fabricating high quality thin oxides for semiconductor devices.
The quality of thin oxides for gate insulating is becoming more important in the field of semiconductor devices fabrication. Many broad categories of commercial devices, such as electrically erasable programmable read only memories (EEPROMs), dynamic random access memories (DRAMs), and more recently, even high-speed basic logic functions, owe their commercialization to the reproducibility of high quality, very thin oxide layers. High quality dielectrics are needed in such devices to achieve satisfactory devices performance both in terms of speed and longevity.
Present gate insulating layers fall short of the requirements necessary for future devices. Most conventional gate insulating layers are pure silicon oxide SiO
2
oxide films formed by thermal oxidation. Others employ a combination of a high temperature deposited SiO
2
layer on a thermally grown layer. Pure SiO
2
layers are unsuitable for future devices because their integrity is inadequate when formed to thicknesses below 150 Å. That is, they suffer from their inherent physical and electrical limitations. Still further, SiO
2
layers suffer from their inability to be manufactured uniformly and defect-free when formed thin. Additionally, subsequent VLSI processing steps continue to degrade the already fragile integrity of thin SiO
2
layers. In addition, pure SiO
2
layers tend to degrade when exposed to charge injection, by interface generation and charge trapping. As such, pure SiO
2
layers are simply inadequate as thin films for future scaled technologies.
It is discovered that the presence of nitrogen in the silicon oxide significantly improves the electrical characteristics of tunnel oxides of EEPROM devices as well as gate oxides of MOS transistors. The presence of nitrogen in the oxide layer, typically a silicon dioxide film, significantly improves the breakdown characteristics of the film. The role of the nitrogen in improving the oxides has been postulated to relax the Si—O bonds by forming Si—N bonds or N—O bonds. See H. Fukada et al. IEEE Elect. Dev. Letters, vol. 12, no. 11, 1991 and A. T. Wu et al., Appl. Physics Letters, vol. 55, 1989. The formation of Si—N or N—O bonds enhances the bond strength and reduces the interface trap density of the oxide, therefore, improving breakdown characteristics.
Experiments have shown MOS capacitors with nitrous oxide possess extremely tight time dependent dielectric breakdown (“TDDB”) distributions. The improvement in TDDB persists even after complete processing and is observed for various structures such as capacitors on p-substrate, capacitors on n+ implanted regions and surface capacitors.
Additionally, it has been discovered that exposing the gate oxide in nitrous oxide N
2
O following the thin gate oxide growth is an effective source of introducing nitrogen to the gate oxide layer under specific temperature conditions. The introduction of nitrogen to the gate oxide layer can significantly enhance the dielectric qualities of the oxide film. The mechanism is believed to work by the nitrogen incorporating itself at the Si/SiO2 interface, replacing the hydrogen that has attached itself to the dangling bonds at that interface. The bond strength of silicon nitride is much higher than that of silicon hydride making for a much more stable film under thermal, electric field or radiation stress.
In tunnel oxides, breakdowns occur because of the trapping of charge in the oxides, thereby gradually raising the electric field across the oxides until the oxides can no longer withstand the induced voltage. Higher quality oxides trap fewer charges over time and will therefore take longer to break down.
It is believed that the improvement in time to breakdown for both tunnel oxides and gate oxides is due to the charge stability in the Si/SiO
2
interface, the poly-silicon/SiO2 and throughout the gate oxide and tunnel oxide region afforded by the presence of nitrogen in these regions.
U.S. Pat. No. 5,296,411 issued to Gardner et al. on Mar. 22, 1994 (“Gardner”) discloses a rapid thermal processing (“RTP”) annealing of the tunnel oxide in a N
2
O ambient environment follows the formation of the thin oxide layer produces high quality thin oxides with improved TDDB. It has been observed that simply adding nitrogen as a source gas will not provide the same results. Thus, the Gardner's disclosure uses N
2
O as a source gas and to decompose N
2
O with a sufficiently high temperature in order for the improvement caused by the presence of nitrogen in the Si/SiO
2
interface. Furthermore, it is also noted that the use of only oxygen gas and nitrogen gas mixture will also not produce the required improvement of the gate and/or tunnel oxides.
However, it was found that the Gardner's process of using high temperature alone to breakdown nitrous oxide can cause increased stress on the semiconductor wafer and increase the dopant diffusion. Additionally, even when N
2
O is broken down using relatively high temperatures, the amount of NO present is only approximately 5% of the total volume. Therefore, an improved nitrous oxide annealing process is needed for controlling the stress and dopant diffusion on the semiconductor wafer while providing a higher concentration of nitrogen in the annealing process.
Thus, despite the quality improvement shown in oxides due to the conventional use of a N
2
O anneal, further improvements are needed to perfect the thin oxide forming process in order to enhance oxide quality and improve the TDDB.
SUMMARY OF THE INVENTION
Therefore, it is an object of the invention to provide a method for more effectively providing a semiconductor device having a high quality thin oxide layer that has improved TDDB characteristics.
A method is disclosed for forming a high quality oxide upon a surface region of a semiconductor body including the steps of: forming a thin oxide layer by oxidizing the silicon wafer in a steam environment; annealing the thin oxide layer in an inert gas ambient; and introducing nitrogen into the oxide under a nitrous oxide N
2
O ambient using a combination of annealing procedures.
In the present invention, the thin oxide layer is preferably formed using a steam oxidation procedure. The steam oxidation procedure produces a high quality thin oxide layer in a single step oxidation rather than conventional multi-step dry oxidation process. It is found that by using the steam oxidation procedure, the resulting thin oxide has a superior dielectric oxide film than the dielectric film formed by dry oxidation method. The ratio of the hydrogen to oxygen during the oxidation step is closely controlled. By monitoring the ratio of hydrogen and oxygen gases during the oxidation step, the resulting oxide film thickness and quality can be controlled while an appropriate film for graded nitridation can be provided.
Subsequent to the thin oxide forming step, nitrogen is introduced to the thin oxide by a combination of nitrous oxide annealing procedures. In the preferred embodiment of the present invention, the nitrous oxide annealing is performed under combinations of in-situ (i.e. tube) and RTP annealing in various conditions of temperature and time. The combinations of the nitrous oxide annealing steps have shown improvement in the quality of the resulting tunnel oxide over the single step nitrous oxide RTP annealing both to the negative and position injection TDDB values. Particularly, negative injection refers to electrons leaving the floating gate to substrate whereas positive injection refers to electrons leaving substrate to the floating gate. In addition, the final oxide thickness and quality can be controlled through the use of different temperature settings during each step of the combination nitrous oxide annealing.
In another embodiment of the present invention, prior to the thin oxide forming step, an ion implant is performed on the EEPROM oxides. Ars

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