Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-10
2006-01-10
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S259000, C257S315000, C257S316000
Reexamination Certificate
active
06984559
ABSTRACT:
A method of fabricating a flash memory is provided. A substrate having several device isolation structures for defining an active region is provided. A tunneling dielectric layer and a patterned mask layer are formed over the active region. A portion of each device isolation structure is removed to form a plurality of trenches. A dielectric layer is formed over the substrate and a sacrificial layer is filled the trenches. A portion of the dielectric layer is removed using the sacrificial layer as a self-aligned mask. The patterned mask layer is removed and a conductive layer that exposed the top section of the sacrificial layers is formed over the substrate. After removing the sacrificial layer, an inter-gate dielectric layer and a control gate are formed over the substrate. A source region and a drain region are formed in the substrate on each side of the control gate.
REFERENCES:
patent: 6844231 (2005-01-01), Kim et al.
patent: 2002/0159886 (2002-10-01), Hiyama et al.
patent: 2004/0182815 (2004-09-01), Lee et al.
Du Chien-Chih
Pittikoun Saysamone
Wang Leo
Jiang Chyun IP Office
Le Dung A.
Powerchip Semiconductor Corp.
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