Method of fabricating a flash memory

Details Method of fabricating a flash memory Method of fabricating a flash memory

1999-10-13

2000-11-14

Fourson, George

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438594, 438595, H01L 21336

Patent

active

061469467

ABSTRACT:
The invention describes a method of fabricating an integrated circuit used to prevent undercutting of an oxide layer due to wet etching. A semiconductor substrate has a gate formed thereon. A conformal oxide layer is formed to cover the gate. Then, a nitrogen ion implantation process is performed to introduce nitrogen ions into the surface of the conformal oxide layer. A high temperature thermal oxidation is performed in order to form Si--N bonds, that is, the nitrogen ions bonding with the silicon atoms of the conformal oxide layer, or to form Si--ON bonds, that is, the nitrogen ions bonding with the oxygen atoms of the conformal oxide layer. A dielectric layer, which covers the conformal oxide layer, is formed. Thereafter, the dielectric layer is etched back to form spacers on the sidewalls of the gate. A wet etching process is performed to remove a part of the conformal oxide layer exposed by the spacers.

REFERENCES:
patent: 5847427 (1998-12-01), Hagiwara
patent: 6040216 (2000-03-01), Sung

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