Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-03-09
1998-03-10
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438398, 438735, H01L 218242
Patent
active
057260850
ABSTRACT:
A storage node 64 of a capacitor having increased charge storage capacity and a method for forming thereof. A doped polysilicon region 68 is formed. A thin layer of hemispherical grain polysilicon 70 is deposited over the doped polysilicon region 68. The doped polysilicon region 68 and the thin layer of hemispherical grain polysilicon 70 are etched using an etch chemistry that etches the doped polysilicon region 68 faster than the thin layer of hemispherical grain polysilicon 70 to increase the surface area of an upper surface 66 of the storage node 64.
REFERENCES:
patent: 5134086 (1992-07-01), Ahn
patent: 5204280 (1993-04-01), Dhong et al.
patent: 5256587 (1993-10-01), Jun et al.
patent: 5342800 (1994-08-01), Jun
patent: 5350707 (1994-09-01), Ko et al.
patent: 5387531 (1995-02-01), Rha et al.
M. Sakao, N. Kasai, T. Ishijima, E. Ikawa, H. Watanbe, K. Tarada and T. Kikkawa; "A Capacitor-Over-Bit-Line (COB) Cell With A Hemispherical-Grain Storage Node for 64 Mb DRAMs"; IEDM 90, 1990 IEEE, pp. 655-658.
J.H. Ahn, Y. W. Park, J.H. Shin, S.T. Kim, S.P. Shim, S.W. Nam, W.M. Park, H.B. Shin, C.S. Choi, K.T. Kim, D. Chin, O.H. Kwon and C.G. Hwang; "Micro Villus Patterning (MVP) Technology for 256Mb DRAM Stack Cell"; 1992 Symposium on VLSI Technology Digest of Technical Papers; 1992 IEEE, pp. 12-13.
Crenshaw Darius Lammont
McKee Jeffrey
Wise Rick L.
Brady III W. James
Donaldson Richard L.
Garner Jacqueline J.
Nguyen Tuan H.
LandOfFree
Method of fabricating a dynamic random access memory (DRAM) cell does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a dynamic random access memory (DRAM) cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a dynamic random access memory (DRAM) cell will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-138846