Method of fabricating a DRAM device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438390, 438395, 438529, 257303, H01L 218242, H01L 21425

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active

060872152

ABSTRACT:
To reduce a junction leakage of an junction interface between a P type well portion formed on a P type substrate and a source region, an impurity region of a first conductive type or a second conductivity type is formed at the junction interface. A plug ion is implanted in the source region to increase a depletion depth of the source region and a counter doping is then performed in the source region to reduce an electrical field of the source region.

REFERENCES:
patent: 5030586 (1991-07-01), Matsuda et al.
patent: 5134085 (1992-07-01), Gilgen et al.
patent: 5389558 (1995-02-01), Suwanai et al.
patent: 5558313 (1996-09-01), Hshieh et al.
patent: 5932906 (1999-08-01), Shimizu
English translation of Purpose and Constitution of JP63-318150 (Dec. 27, 1988).

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