Method of fabricating a data-storage capacitor for a dynamic ran

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438254, 438397, H01L 218234

Patent

active

061626708

ABSTRACT:
A method is provided for fabricating a data-storage capacitor for a DRAM device, which can help increase the capacitance of the resulted capacitor. By this method, a first insulating layer, a second insulating layer, and a third insulating layer are sequentially formed over the substrate. An opening is formed in the third insulating layer, and a contact hole is formed to expose a source/drain region in the substrate. Subsequently, a conductive layer is formed over the third insulating layer, which is electrically connected to the exposed source/drain region. Next, a fourth insulating layer is formed over the conductive layer. A surface part of the third and fourth insulating layers is removed until reaching a predefined depth to allow an upper part of the conductive layer to be exposed. Next, conductive sidewall spacers are formed on the exposed part of the conductive layer to increase the surface area of the conductive layer. The combined structure of the conductive layer and the conductive sidewall spacers serves as a bottom electrode. Subsequently, a dielectric layer is formed over the bottom electrode, and then a top electrode is formed over the dielectric layer. This completes the forming of the intended data-storage capacitor for the DRAM device. In the resulted capacitor structure, the provision of the conductive sidewall spacers can help increase the surface area of the bottom electrode, thereby increasing the capacitance of the resulting capacitor.

REFERENCES:
patent: 5888866 (1999-03-01), Chien
patent: 6027761 (1999-03-01), King

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