Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-04-05
2008-08-05
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S429000
Reexamination Certificate
active
07407860
ABSTRACT:
Compression stress applying portions20of SiGe film are formed in the source/drain regions of the p-MOSA region30a. Then, impurities are implanted in the p-MOS region30aand the n-MOS region30bto form shallow junction regions22a, 22band deep junction regions23a, 23b. The impurity in the shallow junction regions22a, 22bis prevented from being diffused immediately below the gate insulation film15by the thermal processing in forming the SiGe film, the short channel effect is prevented, and the hole mobility of the channel region of the p-MOS transistor14a. The operation speed of the p-MOS transistor13ais balanced with that of the n-MOS transistor, whereby the operation speed of the complementary semiconductor device10can be increased. The semiconductor device fabricating method can increase and balance the operation speed of a p-transistor with that of an n-transistor.
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Kim Young Suk
Mori Toshifumi
Duong Khanh B
Fujitsu Limited
Smith Zandra
Westerman, Hattori, Daniels & Adrian , L.L.P.
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