Method of fabricating a CMOS transistor

Details Method of fabricating a CMOS transistor Method of fabricating a CMOS transistor

1998-01-05

1999-05-18

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438230, 438231, 438305, 438306, 438307, 438232, H04L21/8238

Patent

active

059045205

ABSTRACT:
A gate oxide and a first conducting layer are formed on a substrate, and then the first conducting layer is patterned and a gate in a NMOS region is formed. A LDD, a sidewall spacer, and a drain/source in the NMOS region are then formed in series. A layer of hard mask is formed. The layer of hard mask and the first conducting layer are patterned and a gate in a PMOS region is formed. A LDD, a sidewall spacer, and a drain/source in the NMOS region are then formed in series.

REFERENCES:
patent: 4577391 (1986-03-01), Hsia et al.
patent: 4757026 (1988-07-01), Woo et al.
patent: 5616401 (1997-04-01), Kobayashi et al.
patent: 5759885 (1998-06-01), Son
patent: 5766991 (1998-06-01), Chen
patent: 5786247 (1998-07-01), Chang et al.

Affiliated with

Also associated with

Rating

Method of fabricating a CMOS transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating a CMOS transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a CMOS transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1755572