Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-10-14
1998-06-02
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438398, H01L 218242, H01L 2120
Patent
active
057598959
ABSTRACT:
A method of forming a high capacitance capacitor which does not require additional integrated circuit chip surface area. A capacitor storage electrode or first capacitor plate is formed from amorphous silicon and attached to a polysilicon stud. Dielectric is removed from the under side of the first capacitor plate. The amorphous silicon is then annealed at low pressure to form hemispherical grain polysilicon on the surface of the amorphous silicon thereby increasing the surface area. In one embodiment polysilicon spacers are used to increase the first capacitor plate surface area. The first capacitor plate is then covered by a conformal dielectric layer and a polysilicon second capacitor plate is formed. The capacitor extends over the active integrated circuit chip area but is above the surface of the chip and thereby does not use additional chip area.
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patent: 5478769 (1995-12-01), Lim
patent: 5567640 (1996-10-01), Tseng
patent: 5597756 (1997-01-01), Fazan et al.
patent: 5639689 (1997-06-01), Woo
Ackerman Stephen B.
Chang Joni
Prescott Larry J.
Saile George O.
Vanguard International Semiconductor Company
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