Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-08-27
1999-09-28
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, H01L 218242
Patent
active
059602791
ABSTRACT:
The present invention relates to a stacked memory capacitor of a DRAM cell, particularly, relates to a DRAM cell having a memory capacitor whose storage electrode possesses a remarkably increase area without increasing its occupation area and the complexity of fabrication thereof. By disposing the storage electrode of the memory capacitor on a rugged stacked oxide layer, the area of the storage electrode is remarkably enlarged since the growing of the storage electrode made of a doped polysilicon layer is followed along the topography of the rugged stacked oxide layer, thereby, resulting in a rugged surface thereof. The entire rugged surface of the storage electrode is covered with a dielectric layer to form a plate electrode made of a doped polysilicon layer. The memory capacitor provided by the invention achieves a higher capacitance while maintaining the same occupation area and packing density as that of the conventional arts.
REFERENCES:
patent: 5338700 (1994-08-01), Dennison et al.
patent: 5639689 (1997-06-01), Woo
patent: 5723379 (1998-03-01), Watanabe et al.
Chen Kuang-Chao
Tu Tuby
Chang Chi Ping
Chang Joni
Mosel Vitellic Incorporated
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