Method of evaluating the uniformity of the thickness of the...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21545

Reexamination Certificate

active

07435642

ABSTRACT:
A method of evaluating the uniformity of the thickness of the polysilicon gate layer is provided. A substrate having a dense trenches area and a sparse trenches area is provided. A plurality of first trench isolation structures are formed in the sparse trenches area of the substrate and a plurality of second trench isolation structures are simultaneously formed in the dense trenches area of the substrate. A mask layer is formed between the gaps of the first and the second trench isolation structures. A portion of the first trench isolation structures of the sparse trenches area is then removed. Then, the mask layer is removed until the surface of the substrate is exposed. A polysilicon gate layer is formed over the substrate. Finally, a planarization process is performed to remove a portion of the polysilicon gate layer.

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patent: 2006/0076611 (2006-04-01), Matsui et al.
patent: 2006/0145268 (2006-07-01), Kobori
patent: 2006/0148275 (2006-07-01), Han et al.
patent: 2006/0240612 (2006-10-01), Lee
patent: 2006/0258098 (2006-11-01), Lee
patent: 2007/0026633 (2007-02-01), Lee
patent: 2007/0040235 (2007-02-01), Chan et al.

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