Method of etching vias without sputtering of underlying electric

Details Method of etching vias without sputtering of underlying electric Method of etching vias without sputtering of underlying electric

1991-10-16

1993-12-14

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156657, 156662, H01L 2100

Patent

active

052698793

ABSTRACT:
A process for etching of silicon oxide
itride such as silicon dioxide, silicon nitride or oxynitride. The process includes etching a silicon oxide
itride layer to expose an underlying electrically conductive layer and provide a via extending through the silicon oxide
itride layer to the electrically conductive layer. The etching is performed by exposing the silicon oxide
itride layer to an etching gas in an ionized state in a reaction chamber of a plasma generating device. The etching gas includes a fluoride-containing gas and a passivating gas which is present in an amount effective to suppress sputtering of the electrically conductive layer when it is exposed to the etching gas during the etching step. The passivating gas can be nitrogen gas and the fluoride-containing gas can be CF.sub.4, CHF.sub.3, C.sub.2 F.sub.6, CH.sub.2 F.sub.2, SF.sub.6, other Freons and mixtures thereof. The etching gas can also include a carrier gas such as Ar, He, Ne, Kr or mixtures thereof. The etching can be reactive ion etching or plasma etching and the etching gas can be exposed to a microwave electric field and/or a magnetic field during the etching step. The etching gas can achieve 350% overetching while preventing sputtering of the electrically conductive layer which can be Al, Al alloys, Ti, TiN, TiW and Mo.

REFERENCES:
patent: 4407850 (1983-10-01), Bruce et al.
patent: 4473436 (1984-09-01), Beinvogl
patent: 4617079 (1986-10-01), Tracy et al.
patent: 4784720 (1988-11-01), Douglas
patent: 4844773 (1989-07-01), Loewenstein et al.
patent: 4908333 (1990-03-01), Shimokawa et al.
patent: 4948459 (1990-08-01), Van Laarhoven et al.
patent: 4948462 (1990-08-01), Rossen
patent: 4973381 (1990-11-01), Palmer
patent: 4978420 (1990-12-01), Bach
patent: 4981550 (1991-01-01), Huttemann et al.
patent: 5006485 (1991-04-01), Villalon
patent: 5022958 (1991-06-01), Favreau et al.

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