Method of etching a tantalum nitride layer in a high density...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S720000, C438S742000, C216S067000, C216S075000

Reexamination Certificate

active

06503845

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to a method of etching a layer of tantalum nitride within a semiconductor structure. The method of the invention is particularly useful in etching patterned structures such as a tantalum nitride gate, but may also be used for surface etch back of a tantalum nitride layer.
2. Brief Description of the Background Art
The use of metal or metal nitride gates within semiconductor structures is a relatively new concept in the art of semiconductor manufacture. Tantalum (Ta) and tantalum nitride (TaN) are two of the materials that are under investigation for use in gates.
Tantalum and tantalum nitride have been frequently used in the past as barrier layer materials in copper metallization structures, to prevent the migration of silicon from an underlying substrate into an overlying copper metallization layer. Among the refractory metals, molybdenum and tungsten have been widely recommended as MOS gates on grounds that the gate material must be stable with respect to the gate dielectric, which is typically SiO
2
or Si
3
N
4
. The use of metals such as titanium and tantalum has been considered unpromising because such materials have been considered to be too reactive with oxides and nitrides at higher semiconductor processing temperatures (for example, at temperatures of approximately 600° C. or greater).
The etching of molybdenum has been carried out using CF
4
, with a small amount of oxygen added to increase the etch rate. In the alternative, NF
3
or SF
6
has been used, rather than the CF
4
/O
2
combination, to provide for the more rapid generation of fluorine atoms or radicals. Dilution of the NF
3
or SF
6
with a conventional diluent, such as Ar or He, may increase process control while yielding a reduced metal etch rate.
Etching of layers of some refractory metal nitrides, including tungsten nitride, used in interconnect applications has been done utilizing various etching agents, and combinations of agents, including chlorine-comprising gases (such as Cl
2
, a mixture of Cl
2
/O
2
, or a mixture of HCl, N
2
, and BCl
3
) or fluorine-comprising gases (such as CF
4
or CF
4
/CHF
3
. (See U.S. Pat. Nos. 5,888,588, 6,080,529, 6,008,140, and 6,004,850.)
Additional information pertaining to the etching of tantalum nitride layers in general may be found in Jung, et al, “Electron Cyclotron Resonance Plasma Etching of Materials for Magneto-Resistive Random Access Memory Applications,”
J. Electronic Materials
, Vol. 26, pp. 1310-1313 (Nov. 1997), and Chow et al., “Plasma etching of refractory gates for VLSI applications”.
J. Electrochem. Soc
., Vol. 131, No. 10, pp. 2325-2335 (1984), for example.
If tantalum nitride is to be used as a gate material, in combination with an underlying dielectric material, to provide a stable overall gate structure, it is necessary to provide a method of plasma etching the tantalum nitride gate material at an etch rate which is sufficiently rapid for commercial production purposes, but with adequate selectivity for etching the tantalum nitride in preference to the underlying dielectric material, and with good control over etch profile. The plasma etchant composition must be carefully tailored to the particular material being etched, in order to obtain such a vertical sidewall profile. There appears to be no information in the literature relating to obtaining a vertical profile in gate structures etched in tantalum nitride.
SUMMARY OF THE INVENTION
We have discovered a method of plasma etching a patterned tantalum nitride layer, which is particularly useful in etching solid-state device gate structures. A tantalum nitride layer is etched, in a high-density plasma etching chamber, with a source gas comprising a primary etchant, in combination with a profile-control additive, which provides control over the sidewall profile of etched features. An inorganic chlorine-comprising gas or a fluorine-comprising gas can serve as the primary etchant.
When an inorganic chlorine-comprising gas, such as Cl
2
, HCl, or BCl
3
, is selected as the primary etchant, an inorganic bromine comprising gas, such as HBr, is used as the profile-control additive. This combination would be preferred where the semiconductor structure utilizes an inorganic hardmask rather than an organic photoresist mask, because the bromine-comprising gas provides a passivating effect which compensates for the absence of such an effect from carbon contributed to the plasma by the breakdown of a photoresist. When this etchant combination is used with an organic photoresist present, the resulting sidewall passivation may result in a tapered etch profile. To reduce the amount of taper, the substrate is more highly biased during etching.
When a fluorine-comprising gas, such as SF
6
, NH
3
, or CF
4
is selected as the primary etchant, an inorganic chlorine-comprising gas, such as Cl
2
, HCl, or BCl
3
, is used as the profile-control additive. Use of this combination of etchant gases would be preferred in etching structures having an exposed organic photoresist layer, where the photoresist contributes carbon to the plasma as it breaks down, providing a substantial passivating effect. In particular, use of a source gas consisting of appropriate proportions of fluorine-comprising and chlorine-comprising gases, in the presence of an organic photoresist or other source of carbon in the plasma, produces a vertical feature profile. If this etchant combination is used to etch structures in which an inorganic hardmask layer is used and there is no exposed layer of organic photoresist or other source of carbon in the plasma, a lower ratio of fluorine-comprising to chlorine-comprising gas will be appropriate, to avoid undercutting of the feature profile.
To achieve best results using the method of the invention, the plasma is preferably a high density plasma having an electron density of at least 10
11
e

/cm
3
. In addition, a bias power is applied to the semiconductor substrate to provide more anisotropic etch conditions. The invention is capable of producing vertical (about 88° to 90°) profile sidewalls for etched tantalum nitride lines.


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patent: 5741626 (1998-04-01), Jain et al.
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Diefendorff Keith. “Intel Raises the Ante With P858; Details of Next-Generation 0.18-Micron Process Disclosed.”Microprocessor Report, 13, 1, NA. (Jan. 1999).
Jung et al. “Electron Cyclotron Resonance Plasma Etching of Materials for Magneto-Resistive Random Access Memory Applications.”Journal of Electronic Materials. vol. 26, No. 11. (1997). pp. 1310-1313.
Mehrotra et al. “Properties of direct current magnetron reactively sputtered TaN.”Journal of Vacuum Science&Technology B.vol. 5, No. 6 (Nov.-Dec. 1987). pp. 1736-1740.
Chow et al. “Plasma etching of refractory gates for VLSI applications.”J. Electrochem. Soc.: Solid-State Science and Technology.vol. 131, No. 10. (Oct. 1984). pp. 2325-2335.

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