Method of epitaxy on a silicon substrate comprising areas heavil

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer

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148175, 156612, 438478, 438495, 438509, H07L 2144

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active

061627062

ABSTRACT:
The present invention relates to a method of vapor phase epitaxial deposition of silicon on a silicon substrate including areas containing dopants at high concentration among which is arsenic, while avoiding an autodoping of the epitaxial layer by arsenic, including the steps of performing a first thin epitaxial deposition, then an anneal; the conditions and the duration of the first epitaxial deposition and of the anneal being such that the arsenic diffusion length is much lower than the thickness of the layer formed in the first deposition; and performing a second epitaxial deposition for a chosen duration to obtain a desired total thickness.

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Patent Abstracts of Japan, vol. 6, No. 211 (E-137), Oct. 23, 1982 & JP-A-57 115822 (Nippon Denki KK).
Ishii, et al., "Silicon Epitaxial Wafer With Abrupt Interface By Two Step Epitaxial Growth Technique" Journal Of The Electrochemical Society, vol. 122, No. 11, Nov. 1975, Manchester, New Hampshire, US, pp. 1523-1531.

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